To the external DDR2 memory by the native port interface (NPI) of the Xilinx multi-port memory controller (MPMC). All 12 precompiled designs include XGA RGB565 1024x768p70 video controller based on the direct access.All designs include the Xilinx xps_ethernet_lite 10/100Mb Ethernet controller.Designs have been developed in the Xilinx XPS 14.5 tool chain.MicroBlaze works with 50 MHz clock, EdkDSP accelerator and XGA display controller works with 75 MHz clock, DDR2 works with 100 MHz clocks. All designs include one EdkDSP accelerator with single reconfigurable floating point data path. 12 evaluation versions of designs for the starter Kit 3S700AN.This 3S700AN evaluation package includes: Package can be also installed and used without modification on x86 PC with Linux OS or Windows XP (32 or 64 bit). The document explains how to install and use the demonstrator on Windows7, The note describes use of an UTIA EdkDSP demonstrator package. UTIA EdkDSP Demonstrator in Xilinx 3S700AN FPGA with Embedded FLASH and NV RAM Key featuresĭesigns for Xilinx Spartan3AN FPGA 3S700AN with serial configuration FLASH embedded in the FPGA chip.
